The school of surveying and SIS has designed a FPGA-based GPS receiver. This receiver can be used to log raw data from teh RF front end, but the existing interfaces have insufficient data bandwidth. This project aims to design a small board that will provide this raw data in real time via USB-2 .
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References:
GPS texts, Altera FPGA texts.
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Prequisite:
FPGA expereince preferred
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Group Size:
2
School
of Electrical Engineering and Telecommunications
UNSW Sydney
NSW 2052 Australia